Forty Years of Personal Computing - 16/32-bit Dreams

Back in the days when we were fooling with 8-bit computers, we dreamed about 16 or 32-bit processors. Digging through my notes and records, I found a couple of items. These projects were contemplated, but never built. 

MC68008

When Motorola introduced the MC68008 in 1982, I toyed with the idea of putting one on the SS-50 bus. In my notes, I mapped out the signals required. It might have worked, but it was an awkward fit. The MC6800/MC8609 had synchronous memory access, but the MC68008 was asynchronous. Plus, the MC68000 family really wanted a 16-bit bus.

While I never built anything -- it was more of a thought experiment -- it might have been one of the first applications of a 32-bit processor running on a bus designed solely for an 8-bit processor.

A couple of years later, I spent a lot of time programming the 68000 processor when I started doing Mac development in August of 1984.

NS16032 / NS32016

NS32016 chip set samples, plus a couple
of Dynamic RAM and Refresh Controllers

National Semiconductor (NS) got left behind in the microprocessor chip races even though they were an early entrant. In 1974, they produced a single-chip processor known as the PACE -- a 16-bit design inspired by the DataGeneral Nova. This early pMOS implementation required three power supply voltages, and the bus requirements made designs complex.

By 1976, NS introduced an 8-bit processor, the SC/MP. Compared to the Intel 8080 or the Motorola 6800, it was underpowered. While it may have been a good choice as a micro-controller, the second-generation designs such as the MC6811, MC6805, Intel 8051 and Z-8 choked the SC/MP out of that space.

In 1982, National Semiconductor introduced the NS16032 -- later re-branded as the NS32016. NS32xxx refers to the 32-bit nature of the processor, and the trailing 16 refers to the bus width. It was clearly a competitor to the Motorola 68000, which was introduced in 1979. The NS32016 family was actually a collection of five devices:

• NS32016 CPU - Central Processing Unit
• NS32081 FPU - Floating Point Unit
• NS32082 MMU - Memory Management Unit
• NS32202 ICU - Interrupt Control Unit
• NS32201 TCU - Timing Control Unit

Together, they form the processing core. Depending on the type of system, you might not need much more than the CPU and TCU, provided you didn't need floating point, memory management, or prioritized interrupts. This made for an extensible system based on a common processor core

National Semiconductor also offered a Direct Memory Access Controller -- the NS32203.

Clock speeds of 6, 8 and 10 MHz don't seem fast by today's standards, but where competitive back in 1982. This chip needed a minimum of four clock cycles to access memory -- the same as the Motorola 68000.

Architecture

National Semiconductor devoted a lot of their design work to producing a Complex Instruction Set Computer (CISC) specifically to support high-level languages. The NS32016 has a rich set of addressing modes including direct register, register relative (including the Frame Pointer, Stack Pointer or Static Base registers to which an additional displacement may be added), immediate, absolute, external (using a link table entry). Indexing by a register allowed easy access to local and global variables of high level languages. 

The NS32xxx architecture sported eight registers, a program counter, two stack registers (user and supervisor), a frame pointer and a static base register. The design specified module and interrupt tables in memory. 

Design Ideas

In late 1983, The NS32016 process inspired me to write a 20-odd page article about a "personal minicomputer" -- since I considered this design to be more of minicomputer power level that a microcomputer. It certainly was a lot more powerful than the 8-bit microcomputers of the day.

Sometime in 1984, I obtained a couple of engineering samples of this chip set. From this, I started creating hardware designs. Drawing out the basic core from the five chip set was easy. But a real computer needs memory and peripherals.

At some point, I obtained a second-hand S-100 chassis -- a BYT-8 system. Just a motherboard, power supply and front panel. The S-100 bus had a lot of interconnections and could serve as the backbone of an NS32xxx system, but it wouldn't use the same signals. I ended up scrapping the front panel and painting the cabinet flat black.

For memory, I decided to make use of other members of National's line up:

• DP8419 - Dynamic RAM Controller
• DP84300 - Programmable Refresh timer
• DP84412 - Dynamic RAM Interface

These chips made it very easy to construct a memory array with dynamic memory chips. The designs involved 64K bit dynamic memory totaling 256 to 512 KB. It all depended what I could fit on an S-100 board.

The presence of a memory management controller made virtual memory a possibility. The rest was a small matter of software. In my initial designs, I planned to use the Pertec 8" floppies for virtual memory. Perhaps slow, but possible. In mid-1985, I mapped out the Pertec FD400 internal interface boards as part of this effort.

Other than a bunch of schematics and a painted chassis, I never built anything. A good thought experiment, perhaps. Even with working hardware, the operating system software would have taken years to get going.

And the NS32xxx series wasn't without problems. Part of the reason this chip set never caught up is it was full of defects. National went through several iterations over years to resolve the defects, missing their window to catch the MC68000 family or the Intel 8086 family.